Integrated semiconductor circuits with semiconductor components, such as DRAMs (Dynamic Random Access Memories) are generally subject to extensive functional tests in the production process. Inter alia, the functional tests serve for identifying defective memory cells or defective column lines or row lines or generally defective circuit sections of the semiconductor component. In order to guarantee an error-free operation of the memory module, the semiconductor components are tested under different operating conditions, for example, predetermined data values being written to memory cells of a memory cell array and subsequently being read out again in order to be compared with the predetermined data values.
Integrated semiconductor circuits often have an integrated switching unit that automatically carries out a functional test of the integrated semiconductor component when the semiconductor circuit is started up. Such a switching unit is referred to according to its function as a BIST (Built-In Self-Test) unit since a microprocessor into which the switching unit is integrated automatically carries out a self-test of its own semiconductor component when it is activated, i.e., supplied with power. The BIST unit has a BIST controller that is integrated as a switching area in the semiconductor circuit as an ASIC (Application Specific Integrated Circuit). Commands issued by the BIST controller are forwarded to the semiconductor component, the BIST controller monitoring and evaluating the execution of the commands. The data communicated by the semiconductor component with regard to its operating states are for example processed by external test systems to form test results that can be used to make a statement about whether and, if appropriate, which memory areas are not functioning as envisaged.
The BIST controller for testing semiconductor components, in particular, for example, dynamic semiconductor memories, is designed such that the cell array can be addressed in a timing-critical manner and binary potential data topologies coded as voltage values can be written to and read from the semiconductor memory in a suitable write/read sequence in an address-dependent manner. In this case, during each read process, the electrically detected and binary represented information is compared with the logically determined expected values. If no incorrect storage is found after a series of positively assessed write/read accesses during the test sequence, the semiconductor component is classified as “pass,” otherwise it is regarded as “fail.”
The semiconductor circuit may furthermore be connected to an external test apparatus for the purpose of testing, the test apparatus itself generating the test commands required for testing the semiconductor component, namely control commands, address commands, and data values to be stored, and also the required clock signal, and sending the commands via a standard interface of the semiconductor component and reading out the test results.
Test modes including functional tests may enable access to module-relevant parameters or settings and be called up and set with the aid of the BIST controller or via the standard interface of the semiconductor circuit, by an activation known only by the manufacturer. Like the BIST controller, the test modes are also implemented as ASIC in the semiconductor circuit and, consequently, cannot be set flexibly. Consequently, the space that has to be invested for these types of ASICs for test purposes adversely affects the costs in the fabrication of the semiconductor circuit.
In order to obtain a meaningful test result, it is important for the semiconductor component also to be tested at an operating frequency which it has in normal operation. However, it is not possible to directly compare a characteristic mode of operation of the application with the mode of operation of the functional test in order to be able to ascertain whether the integrated circuit has been tested in a manner near the application. Consequently, it is not possible to make a statement about the fact that the circuit tested in the fabrication process has run through all the operating modes that occur in the later application, since it is often the case that many problems are not discovered until during field use and are therefore subsequently corrected only after the development phase.
Various BIST units for testing of microprocessors or for monitoring of functionality and for testing of semiconductor circuits and detection of malfunctions are known in the art.
Further, it is known to store test contents in coded fashion in the form of fuses or other nonvolatile memories on the semiconductor component in order to keep them ready in a module-specific manner for later evaluations during repair or degradation examinations. Moreover, it is known to store the test results obtained by the BIST unit in the semiconductor circuit itself.
In previous test concepts, the BIST unit is used only during testing in production. Operating parameters gathered during the operation of the semiconductor circuit can be analyzed by the manufacturer only when a memory module having a defective semiconductor circuit is returned to the manufacturer. Consequently, characteristic data possibly programmed in, such as, for example, chip ID, test data, or setting parameters can be used only for a historical posttracking of production, but not for user-specific setting during operation.
A semiconductor circuit that can both be tested and configured in boot mode and be tested, analyzed and set in a manner near the application during normal operation without its function being impaired is desirable. Furthermore, a corresponding method for testing, monitoring and application-near setting of the semiconductor circuit is also desirable.